Lanner LEC-7900 User Manual download pdf (Page 33)

return 0;

}

//;********************* Read SIO

*****************************************************

int read_w83627UHG_reg(int LDN, int reg)

{

outportb(INDEX_PORT, 0x07); //LDN register

delay(1);

outportb(DATA_PORT, LDN);

delay(1);

outportb(INDEX_PORT, reg);

delay(1);

return inportb(DATA_PORT);

}

//;********************* Write SIO

*****************************************************

int write_w83627UHG_reg(int LDN, int reg, int value)

{

outportb(INDEX_PORT, 0x07); //LDN register

delay(1);

outportb(DATA_PORT, LDN);

delay(1);

outportb(INDEX_PORT, reg);

delay(1);

outportb(DATA_PORT, value);

return 0;

}

//;********************* Enter SIO

*****************************************************

int Enter_Configuation()

{

outportb(INDEX_PORT, 0x87);

delay(1);

outportb(INDEX_PORT, 0x87);

return 0;

}

//;********************* Exit SIO

*****************************************************

int Exit_Configuation()

{

outportb(INDEX_PORT, 0xaa); //Exit

W83627THG Configuration

return 0;

}

//;********************* Init WDTO and SB GPIO

*****************************************************

int Init_WDTO_GPIO_Interface()

{

Enter_Configuation();

write_w83627UHG_reg(0x07, 0x30, 0x01); //;enable GPIO3X

delay(5);

write_w83627UHG_reg(0x07, 0xE0, read_w83627UHG_reg(0x07, 0xE0) & 0xF0);

//Set GPIO30,31,32,33 to output

delay(5);

write_w83627UHG_reg(0x07, 0xE0, read_w83627UHG_reg(0x07, 0xE0) | 0xF0);

//Set GPIO34,35,36,37 to intput

delay(5);

Exit_Configuation();

return 0;

}

//input: none

//output: 1 = not correct SuperIO

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Lanner LEC-7900 User Manual Page 33

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